David J. Willis

LinkedIn Profile
dwillis1224@gmail.com

Summary

Highly experienced and creative Electrical Engineer with 20 years of experience in design of integrated circuits including specification writing, design, and fabrication. Knowledge of semiconductor physics, semiconductor wafer processing and testing. Able to carry the design from concept to production including design verification. Specializing in DSP and low-power Sigma-Delta design.

Open to short term temporary contracts doing ASIC design and testing, embedded controls, DSP, and tutorials on these topics.

Professional Skills

Achievements

  • History of reducing power consumption while maintaining performance (see Cirque)
    • Developed capacitive touch solutions achieving as high as 75% reduction in power. Proven in silicon.
    • Architected a design for a MEMS pressure sensor to reduce power from 2.5V at 240uA to 1.8V at 70uA. Proven in simulation.
  • Experience working with cross-functional teams including quality control, software, mechanical, sales and marketing, and test.
  • 5 US Patents submitted, 3 patents awarded. Click here for summary

Work Experience

1992 to present, Independent Consultant, DW Consulting

  • 2021: Architecture for a capacitive pressure sensor in a very small package using 180nm process. Design included a delta-sigma switched-capacitor front end that was insensitive to VDD and process. Developed a daisy-chain style asynchronous serial data architecture that allowed several sensors to output the result onto a single wire. Goal was met and delivered on time. An acceptable design specification was delivered for final design.
  • 2020: Developed and wrote over 100 questions to test the skill level of candidates applying for embedded C positions. Questions involved for-loops, data structures, unions, structures, real-time principles, peripheral interfaces, etc. Delivered the material on time.
  • 2020: Wrote a C# library to do matrix math and to optimize calibration of capacitive touch sensor during production tests. The resulting process needed only 5 measurements to characterize the sensor so that a mathematical solution could be found to determine the correct setting for 2 controls with over 16000 possible settings. The method could be used for more than 2 controls.
  • 1997: Wrote object-oriented MatLab S-functions to model an absorption cooler. The model included pressure, temperature and mixing of saline solutions. Used to aid customer in developing control algorithms.
  • 1993: Wrote C code for a Z80 based data logger to monitor speed and braking for an automotive brake manufacturer.

May 2011 to Mar 2020, Senior Research and Development, Cirque Corp

    Click here for more details
  • Participated in research and architecture of new designs, writing specifications, developing behavioral models, creating test benches, and proving design in the lab. Worked on ASIC mixed-signal design team on analog front end to sense capacitive touch using 130nm and 180nm processes.

Nov 2003 to April 2011, Principal Engineer, ON Semiconductor

    Click here for more details
  • Technical lead and Project lead for multiple mixed-signal automotive and aerospace ASIC sensor interfaces.
  • Responsible for gyro sensor interface which included 3 Sigma-Delta modulators (2ADC and 1DAC), a PLL, and multiple control loops for sensor control. I wrote the ASIC specification and led a team to do the design.
  • Worked with customers to develop specifications and time lines. Led team of engineers to do the design, then worked with test engineers, quality engineers, and product engineers to move the design into production.
  • Developed a single-pin interface and algorithm to program the gain and offset needed for an automotive pressure sensor interface. The same pin is used for data ouput in normal operation. The pressure sensor has a highly non-linear temperature dependence. Developed and patented a method to linearize the result using Pade Approximants. See USPTO #7991571 and #7398173
  • Taught tutorials at MWSCAS on layout practices, filters, ADC’s DSP, etc.
  • Received 3 patents as well as writing and presenting multiple papers.

Dec 2000 to Nov 2003, Senior Design Engineer, SliceX

    Click for more details
  • Designed mixed-signal opamps, active filters, etc.
  • Designed in various processes including 0.18u, 0.25u, 0.35u. Did some memory work in 90nm.
  • Trained 12 engineers in CMOS SRAM process conversion while on contract at customer site.

Detailed ASIC Design Experience

Over 20 Years Design Experience Using Cadence and Mentor Tools.

May 2011-March 2020 Senior R&D Engineer Cirque Corporation

Participated in research and architecture of new designs, writing specifications, developing behavioral models, creating test benches, and proving design in the lab. Worked on ASIC mixed-signal design team on analog front end to sense capacitive touch using 130nm and 180nm processes. I became an expert in noise analysis and reduction techniques. Developed multiple architectures for Sigma-Delta ADCs. Most of my designs reduced power compared to previous designs.
  • Developed a new capacitive sense architecture. The previous design was costly and consumed too much power. Options considered included a Dual-Slope ADC and variations of Sigma-Delta modulators. We developed a RAM based programmable stimulus giving us control over several parameters to optimize the design for different applications. This was a research project and did not go to production.
  • System architect and technical lead for a 32 channel low power capacitive touch ASIC. Did noise and sensitivity analysis, wrote verilogA and AMS code to simulate and model the design in Cadence. Wrote C# code and worked with software engineers to test the device after it came out of fab.
  • System architect and technical lead for simusoidal based capacitive sensor interface. Later, Cirque's parent company, ALPS, tasked my team to rearchitect the design to reduce power and cost by 50% while maintaining performance. We were very close to meeting the required improvements. New architecture moved large power-hungry blocks to digital and optimized digital design to consume less power and energy. This was a research project and did not go into production.

Nov 2003-April 2011 Principal Engineer ON Semiconductor

My automotive ASIC design experience was at AMI Semiconductor which later became ON Semiconductor. I was either a technical lead or team lead the entire 7 years working there. In addition to analog design I was on a patent review committee and submitted and reviewed several papers for internal and external conferences. see papers.
  • Technical lead on a team of 3 to design an LED high-side driver chip for controlling LED soft turn on and off for an automotive application.
  • Team and Technical Lead for a pressure sensor design for an automotive air coniditioner. We had to work around patents and I was able to implement a solution for linearizing the temperature curves such that the pressure sensor had a very small dependence on temperature. This resulted in a patent on using pade approximants for characterizing a sensor. Later I wrote and presented a paper at MWSCAS. One key feature of the patent was the ability to do a multi-segment linearization. The solution was to constrain the coefficients of the Pade Approximant such that end points of each segment were equal and the derivative where the segments met was equal. This resulted in a smooth operation. As an automotive chip, the IC had to work at 12V typical and be safe for operation up to 40V. I wrote C and ASM code for a PIC microcontroller to test the design.
  • My final design at ON Semiconductor was to bring to production a 3-axis MEMS gyro interface for an aerospace application. The design involved a capacitive MEMS gyro (outside design). The design included a low frequency PLL, a 2nd-order and a 3rd-order Delta-Sigma ADC and a Delta-Sigma DAC. I wrote the ASIC specifications based on customer input. I did the PLL loop filter design while leading the team to design the other blocks.
Additional Tasks for ON Semi
  • Wrote MatLab code for modeling a PLL to determine lock time over process corners.
  • Wrote C++ and Visual Basic code to work under MS Excel as a macro
  • Wrote C and ASM code for a PIC microcontroller to test the designs
  • Lab manager in charge of purchasing and developing code for National Instruments equipment

Jan 2001-Nov 2003: Salt Lake Integrated Circuits Experts: Senior Design Engineer

Designs include:
  • Partial analog front end to a USB2.0 interface (design did not include the DLL)
  • I was part of a 2 man ASIC design team to develop a time-sliced, 10-bit pipeline ADC for CCD camera.
  • I spent my last year at SliceX working at a customer site doing process conversions for SRAM memory. I saw a need for improved documentation so I worked evenings to create the needed documentation. As a result, I was asked to stay on and help train other engineers in the process conversion.

Sep 1988-Dec 2000 Associate Professor, Oregon Institute of Technology

Taught undergraduate courses in basic circuits, Laplace transforms, bipolar and FET transistors, embedded controls. IEEE student advisor. In 1995, took a sabbatical to do coursework towards doctorate degree.
  • Developed course on special devices such as Diacs, Triacs, SCRs, etc.
  • Developed a DSP course to teach z-domain and digital filters
  • Developed a course on analog filter design. Wrote a program in Pascal to calculate the coefficients of Butterworth, Bessel, Chebychev, Inverse Chebychev and Elliptic filters
  • Wrote and received a grant to develope a test engineering capstone course. Topics included IEEE-488 bus and programming, VXI architecture, and calibration.

Education

Electrical Engineer Degree (post MS degree)

IC Design, Control Systems, Sensors, Optics, Digital Signal Processing

M.S.E.E., minor in Math, University of Arizona

IC Design, RF and Microwave, Statistics, Optics, Digital Signal Processing, Filter Design

B.S.E.E., minor in Physics and Spanish, Utah State University

Analog Focus

Detailed Specific Experience

Pipeline, Dual Slope, SAR and Sigma-Delta ADC Experience

I spent 5 years in industry before teaching college for 12 years. These opportunities gave me experience in ADC architectures. After teaching college I joined SLICEX where I was part of a 2 man ASIC design team to develop a time-sliced, 10-bit pipeline ADC for CCD camera for SLICEX. Later, at AMI Semiconductor I converted a previously designed 10-bit capacitive SAR to work with an automotive pressure sensor. I was the team lead over 4 engineers on this project. Later, I led a 4 person team (one digital and 3 analog engineers) to bring to production a 3-axis gyro for an aerospace application. Working knowledge of DNL, INL, resolution, ENOB, etc.

While at Cirque I architected and designed multiple Delta-Sigma ADC's for capacitive sensor touch pads. To measure capacitances in the 10 to 100ff range, we took advantage of the oversampling nature of the DSM to reduce the noise in the signal. My designs continuously were able to reduce the area and power by a factor of 4 or more in some cases. The Cirque designs were all incremental ADC implementations. One of the Delta-Sigma ADCs included a 7-level flash ADC for the quantizer. We used LFSR to dither the feedback DAC.

Sensor Interfaces

I have developed interfaces to resistive pressure sensors, capacitive pressure sensors, MEMS gyro, capacitive touch, and others. Topologies include bridge circuits as well as single-ended solutions.

Digital Signal Processing

Developed coursework at OIT in DSP. MSEE and doctorate include several courses in DSP including z-domain, digital filters, optimization techniques, etc. My DSP background has been extremely usefull for switched-capacitor design.

Switched-Capacitor Circuits

I have been using switched-capacitor technology for over 20 years. I understand kT/C noise, offset cancellation, charge-injection, common-mode feedback, etc. My project for the doctorate degree was a zero CVF current switched-capacitor amplifier.

Simulators

Proficient at simulations in Spectre including AC and transient noise, VerilogA and AMS behavioral models. Also proficient at using LTSpice including use of .step, .meas, etc. Worked with Silvaco Simulator while at SliceX.

Analog Filter Design

Working knowledge of analog filters including Butterworth, Bessel, Chebychev, Inverse Chebychev, and Elliptic transfer functions. Experience implementing Sallen-Key, Tow-Thomas, and other topologies to implement the transfer function. Understanding of effects opamp has on the final transfer function.

Programming Experience

Proficient in C, C++, C#, MatLab and Javascript. Designs include software interfaces for Visual Studio for Windows applications as well as embedded programming of PIC controllers and Arduino microcontrollers. Used MatLab extensively for behavioral modeling to predict ADC noise performance.

Patents and Papers

Patent # 11,048,361 June 29, 2021

A system for generating a control signal for a capacitive sensor includes a waveform generator configured to generate a digital waveform, a first sigma-delta modulator (SDM) configured to generate a first output corresponding to the control signal based on the digital waveform and first adjustment data and a second SDM configured to generate a second output corresponding to an offset signal based on the digital waveform and second adjustment data. The first SDM is configured to selectively adjust a phase and an amplitude of the control signal and the second SDM is configured to selectively adjust a phase and an amplitude of the offset signal.

Patent # 7,526,693 April 28, 2009: Initial Decision-point circuit operation mode

A circuit that includes a controller and at least one control I/O pin. When the controller is placed into an initial state, the controller initializes the circuit into an initial operation mode. Depending on whether or not signal(s) satisfying predetermined criteria are applied to at least one of the control I/O pins, the controller will cause the circuit to enter one of two or more post-initial operation modes. Accordingly, by initializing the controller, and by controlling a signal on the control I/O pin(s), the operating mode of the circuit may be controlled. In one embodiment, a given control pin might be configurable to be both analog and digital, depending on the circuit's operation mode.

Patent # 7,398,173 July 8, 2008 Providing nonlinear temperature compensation for sensing by means of pade approximant function emulators

Pade Approximant function emulators are used to model the nonlinear offset and/or nonlinear sensitivity behaviors of a sensor relative to temperature sub-ranges and to produce temperature compensating corrections for both offset and sensitivity as desired. In order to avoid use of brute force division for generating the Pade Approximant function signals, in one set of embodiments, feedback is used to provide a corresponding effect. In order to minimize the number of coefficients that are to be resolved and stored, in one set of embodiments, first or higher order Pade Approximants with normalized denominators are used so that each function can be defined with just three coefficients. Embodiments that are more analog in nature or more digital in nature are disclosed. Methods for resolving the Pade Approximant coefficients and calibrating each sensor unit on a mass production basis are also disclosed. Updated as Patent # 7,991,571 August 2, 2011